LT Releases a "Tiger" like RGB driver board... not DMX but SPI driven

dmoore

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LTech (which makes the 6803 driver box that has been tested here in another thread) has released what is kind of like a Tiger 120 board - sans the DMX and is only 96 channels. To drive it with DMX, you need on of their LT-8020 driver boxes. Here is a diagram showing hookup:

file_9_7.jpg


Here is the website:
http://www.ltech.cn/english/product/LED-RGB-Driver.html

Here is a US seller of the item:
http://www.usledsupply.com/shop/rgb-32-spi-dmx-decoder.html


So, what exactly is "SPI" as a communications protocol?
 

dmoore

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Here is the price list that goes along with it. Ray Wu can order items directly from LT if you are considering any samples.
 

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TimW

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It depends a lot on how the boards work.....

SPI is a way of getting data from the DMX interface to the controller. The SPI stream could contain a series of greyscale levels that might be latched into the controller.. which then continues to output signals at that dimming level all by itself until the next set of values is received. In this case the controller is just a 'multi pixel' and should be able to be driven by MPH or other converters pretty easily (better to ask MPH that question though!)

OR.. the SPI could be just telling each channel to turn on or off... the 'dimming' would be derived by how much of the time each channel is on vs how much time it is off. This requires a lot more effort from the DMX interface (because it has to tell each channel whether its on or off hundreds of times a second....). In this case the controller would be little more than a GRINCH (see DIYC)..

Hard to tell just by looking (without knowing the chips on the controller).
 

n1ist

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May 20, 2010
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SPI is a serial bus where you have a clock, a data out pin (from the master to the slaves, often called MOSI - master out, slave in), a chip select, and an optional data in pin (MISO - master in, slave out). The nodes on an SPI bus are basically shift registers where the data out pin from one is connected to the data in pin of the next.
So you set chip select low, clock in "n" bits of data to load all the shift registers, and then set chip select hi to latch the data.

The real key, as TimW said, is what the nodes do with the data. They could use the data to set the intensity, or it could be up to the master to do the PWM and shift out the data fast enough.
/mike
 
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